Review of kernel and user-space Neural Processing Unit (NPU) chips support on Linux
UD2.120 (Chavanne) | Day 1 | 18:15 - 18:35 | Speakers: Jakov Petrina Trnski
Abstract
In the last 10 years there's been a hardware race to build the best application-specific integrated circuit (ASIC) for both machine learning training and inference i.e. AI accelerators. What started with vision processing units (VPUs) went through tensor PUs (TPUs) and now we are dealing with neural processing units (NPUs). What's next?
This talk will take a systematic look at the different hardware platforms for AI acceleration, but with a focus on the software stacks that support them on Linux. We'll take a look how individual vendors approached their ASICs from the kernel side, and how they exposed the acceleration functionality for user-space.
Is it all proprietary or is there liberté? We'll find out together!
Attachments
Links
- [PATCH v9 00/10] New DRM accel driver for Rockchip's RKNN NPU
- Mesa TensorFlow Lite / LiteRT delegate "Teflon"
- Video recording (AV1/WebM; preferred) - 56.7 MB
- Video recording (MP4; for legacy systems) - 441.9 MB
- Video recording subtitle file (VTT)
- (addendum) Adhitya Mohan (2025.) "Reverse-Engineering the RK3588 NPU: Hacking Memory Limits to Run Vision Transformers"
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External Links
Notice: The placeholder video image is licensed under CC BY-SA 4.0. The original image can be found hereChanges made to the image are: Cropped the image to a new ratio, part of the image was cut off.
