VACASK and Verilog-A Distiller - building a device library for an analog circuit simulator

VACASK is a novel FOSS analog circuit simulator with a clear separation between device models (i.e. equations) and circuit analyses. It is based on the state of the art KLU sparse matrix library and utilizes the OpenVAF Verilog-A compiler for building its device models from Verilog-A sources. A comparison with other FOSS analog circuit simulators is presented and the roadmap for future development is discussed. A major obstacle in development of VACASK (and every other new simulator) is the implementation of legacy device models that boils down to writing tens of thousands of lines of C code. Legacy device models are used in several older PDKs as well as in models of a large number of discrete electronic components. A novel approach to implementing these device models is proposed: a converter from SPICE3 API-based C code into modern Verilog-A code. The performance of the converted models is compared to that of native SPICE3 models. At the present the converted models can be used in VACASK and Ngspice circuit simulators as well as in any other simulator that supports Verilog-A. The limitations of the approach are discussed. Some alternative use cases for the converter are proposed and a roadmap for its future development is presented.